タイトルまたは説明

High Performance, Low Power Atmel®AVR® *-Bit Microcontroller Family
Advanced RISC Architecture
̶ **1 Powerful Instructions Most Single Clock Cycle Execution
̶ *2 x 8 General Purpose Working Registers
̶ Fully Static Operation
̶ Up to *0 MIPS Throughput at *0MHz
̶ On-chip *-cycle Multiplier
 High Endurance Non-volatile Memory Segments
̶ 4/8/*6/*2KBytes of In-System Self-Programmable Flash program memory 
̶ **6/**2/**2/1KBytes EEPROM 
̶ **2/1K/1K/2KBytes Internal SRAM 
̶ Write/Erase Cycles: *0,**0 Flash/**0,**0 EEPROM
̶ Data retention: *0 years at *5C/**0 years at *5C(1)
̶ Optional Boot Code Section with Independent Lock Bits
 In-System Programming by On-chip Boot Program
 True Read-While-Write Operation 
̶ Programming Lock for Software Security
 Atmel® QTouch® library support
̶ Capacitive touch s, sliders and wheels
̶ QTouch and QMatrix® acquisition
̶ Up to *4 sense channels
 Peripheral Features
̶ Two *-bit Timer/Counters with Separate Prescaler and Compare Mode
̶ One **-bit Timer/Counter with Separate Prescaler, Compare Mode, and 
Capture Mode
̶ Real Time Counter with Separate Oscillator
̶ Six PWM Channels
̶ *-channel **-bit ADC in TQFP and QFN/MLF package
 Temperature Measurement
̶ *-channel **-bit ADC in PDIP Package
 Temperature Measurement
̶ Programmable Serial USART
̶ Master/Slave SPI Serial Interface
̶ Byte-oriented *-wire Serial Interface (Philips I2
C compatible)
̶ Programmable Watchdog Timer with Separate On-chip Oscillator
̶ On-chip Analog Comparator
̶ Interrupt and Wake-up on Pin Change