|
Model
|
FL2N**4MT
|
FL2N**4MT *4TC
|
FL2N**4MT -CAN
|
FL2N**4MT *4HS
|
FL2N**2MRT
|
FL2N**2MRT*4TC
|
FL2N**8MT
|
FL2N**8MT*4HS
|
FL2N**4MT
|
|
Feature：
|
|
CPU
|
ARM Cortex M3
CPU
|
|
Digital
Input
|
*2
Input x*2，supporting source/drain
type
|
*2
Input x*2，supporting source/drain
type
|
*2
Input x*2，supporting source/drain
type
|
*2
Input x*2，supporting source/drain
type
|
*6
High-level x4,general x*2,supporting
source/drain type
|
*6
High-level x4,general x*2,supporting
source/drain type
|
*4
Input x*4，supporting source/drain
type
|
*4
High-level x4,general x*2,supporting
source/drain type
|
*2
Input x*2，supporting source/drain
type
|
|
Digital
Output
|
*2
NPN transistor power output x*2
|
*2
NPN transistor power output x*2
|
*2
NPN transistor power output x*2
|
*2
NPN transistor power output x*2
|
*6
NPN transistor high-level output x4，NPN
transistor power output x4, relay
outputx8
|
*6
NPN transistor high-level output x4，NPN
transistor power output x4, relay
outputx8
|
*4
NPN transistor power output x*4
|
*4
NPN transistor high-level output x4，NPN
transistor power output x4, relay
outputx8
|
*2
NPN transistor power output x*2
|
|
High-Speed
Input
|
N/A
|
N/A
|
N/A
|
*-way AB /*-way
separate high-speed counting
|
*-way AB /*-way
separate high-speed counting
|
*-way AB /*-way
separate high-speed counting
|
N/A
|
*-way AB /*-way
separate high-speed counting
|
N/A
|
|
High-Speed
Output
|
N/A
|
N/A
|
N/A
|
*-way high speed surge
immunity output(**0kHz x2, *0kHz x2)
|
*-way high speed surge
immunity output(**0kHz x2, *0kHz x2)
|
*-way high speed surge
immunity output(**0kHz x2, *0kHz x2)
|
N/A
|
*-way high speed surge
immunity output(**0kHz x2, *0kHz x2)
|
N/A
|
|
Analog
Input
|
N/A
|
4
K-type thermocouple ，**-digit
ADC
|
N/A
|
N/A
|
N/A
|
4
K-type thermocouple ，**-digit
ADC
|
N/A
|
N/A
|
N/A
|
|
Bus
Communication
|
N/A
|
N/A
|
CAN
|
N/A
|
N/A
|
N/A
|
N/A
|
N/A
|
N/A
|
|
User Program
Memory
|
**0K Bytes(>*0K
Bytes)
|
|
Involatile Data
Memory
|
2K
Bytes
|
|
Timer
|
**6
**0ms timer x**6(0.1~***6.7 seconds)
*0ms timer x*6(0.*1~**7.*7 seconds)
1ms timer
x4(0.**1~*2.**7 seconds)
|
|
Counter
|
**5
|
|
High-speed
Interrupt
|
X*-X5 rising and falling
edge interruption, *-way timing
interruption
|
|
Program Execution
Model
|
Cycling
scanning
|
|
Execution
Speed
|
0.1us/***0AWL
ON:5us/OFF:5us)
|
|
Programming
Language
|
Ladder diagram/standard
C program (both can be used)
|
|
Comunication
Protocol
|
RS**2 x1, RS**5 x1,
Supporting Mitshubish FX2N and Modbus RTU
communication
|
|
Programming
Port
|
USB
connection
|
|
Electrical Specifications：
|
|
Power
Consumption
|
4W
|
|
Input
Power
|
DCDC *4V, Input Range:
DC *8V~*2V
|
|
Power
Protection
|
Isolated Power,
protect from surging and thunderstrike
|
|
Power Down
Allowed
|
<5ms
|
|
CE &
ROHS
|
Complied with
EN********2:***5，EN********4:***7 standard,
ROHS
Surge Immunity: ±4KV, EFT:±4KV,
ESD:4KV，Air: 8KV
|
|
Environment
Specifications：
|
|
Operating
Temperature
|
**0～*0℃
|
|
Storage
Temperature
|
**0～*0℃
|
|
Operation
Humidity
|
*0~*0%RH(No
condensation)
|
|
Cooling
|
Natural air
cooling
|
