ï® **-line demultiplexing capability ï® Decodes 4 binary-coded
inputs into *6 mutually-exclusive outputs ï® Complies with JEDEC
standard no. 7A ï® Input levels: ïµ For *4HC**4: CMOS level ïµ
For *4HCT**4: TTL level ï® ESD protection: ïµ HBM JESD**-A**4F
exceeds ***0 V ïµ MM JESD**-A***-A exceeds **0 V ï® Multiple
package options ï® Specified from ï€*0 ï‚°C to **5 ï‚°C and ï€*0
ï‚°C to ***5 ï‚°C 3. Ordering information *4HC**4; *4HCT**4 *-to**6
line decoder/demultiplexer Rev. 7 — *9 February ***6 Product data
sheet Table 1. Ordering information Type number Package Temperature
range Name Description Version *4HC**4D ï€*0 ï‚°C to ***5 ï‚°C
SO*4 plastic small outline package; *4 leads; body width 7.5 mm
SOT****1 *4HCT**4D *4HC**4DB ï€*0 ï‚°C to ***5 ï‚°C SSOP*4 plastic
shrink small outline package; *4 leads; body width 5.3 mm SOT****1
*4HCT**4DB *4HC**4PW ï€*0 ï‚°C to ***5 ï‚°C TSSOP*4 plastic thin
shrink small outline package; *4 leads; body width 4.4 mm SOT****1
*4HCT**4PW *4HC**4BQ ï€*0 ï‚°C to ***5 ï‚°C DHVQFN*4 plastic dual
in-line compatible thermal enhanced very thin quad flat package; no
leads; *4 terminals; body 3.5 ï‚´ 5.5 ï‚´ 0.*5 mm
